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www.irf.com ? 2010 international rectifier march 24, 2010 IR11682S dual smart rectifier driver ic features ? secondary-side high speed controller for synchronous rectification in resonant half bridge topologies ? 200v proprietary ic technology ? max 400khz switching frequency ? anti-bounce logic and uvlo protection ? 4a peak turn off drive current ? micropower start-up & ultra low quiescent current ? 10.7v gate drive clamp ? 80ns turn-off propagation delay ? wide vcc operating range ? direct sensing for both synchronous rectifiers ? cycle by cycle mot che ck circuit prevents multiple false trigger gate pulses ? minimal component count ? simple design ? lead-free typical applications ? lcd & pdp tv, telecom smps, ac-dc adapters product summary topology llc half-bridge vd 200v v out 10.7v clamped i o+ & i o- (typical) +1a & -4a turn on propagation delay 100ns (typical) turn off propagation delay 80ns (typical) package options 8-lead soic typical connection diagram load sr1 sr2 cdc 1 2 lr c1 c2 rtn vin vd2 5 vs2 6 vs1 3 vcc 2 vd1 4 gnd 7 gate2 8 gate1 1 ir1168 cout rg2 rg1 m1 m2 *please note that this datasheet contains advance information that could change before the product is released to production. ir11682 datasheet no ? 97476
IR11682S www.irf.com ? 2010 international rectifier 2 table of contents page description 3 qualification information 4 absolute maximum ratings 5 electrical characteristics 6 functional block diagram 8 input/output pin equivalent circuit diagram 9 lead definitions 10 lead assignments 10 application information and additional details 12 package details 19 tape and reel details 20 part marking information 21 ordering information 22
IR11682S www.irf.com ? 2010 international rectifier 3 description ir11682 is a dual smart secondary-side rectifier driver ic designed to drive two n-channel power mosfets used as synchronous rectifiers in resonant converter app lications. the ic can control one or more paralleled n mosfets to emulate the behavior of schottky diode re ctifiers. the drain to source for each rectifier mosfet voltage is sensed differentially to determine the level of the current and the power switch is turned on and off in close proximity of the zero current tr ansition. the anti shoot-thr ough protection logic prevents both channels from turning on the power switches at the same time. the cycle-by-cycle mot protection circuit can automatically detect no load condition and tu rn off gate driver output to avoid negative current flowing through the mosfets. ruggedness and noise immunity are accomplished using an advanced blanking scheme and double-pulse suppression that allo ws reliable operation in fixed and variable frequency applications.
IR11682S www.irf.com ? 2010 international rectifier 4 qualification information ? industrial ?? qualification level comments: this family of ics has passed jedec?s industrial qualification. ir?s consumer qualification level is granted by extension of t he higher industrial level. moisture sensitivity level soic8n msl2 ??? 260c (per ipc/jedec j-std-020) machine model class b (per jedec standard jesd22-a115) esd human body model class 2 (per eia/jedec standard eia/jesd22-a114) ic latch-up test class 1, level a (per jesd78) rohs compliant yes ? qualification standards can be found at international rectifier?s web site http://www.irf.com/ ?? higher qualification ratings may be available shoul d the user have such requirements. please contact your international rectifier sale s representative for further information. ??? higher msl ratings may be available for the specific package types listed here. please contact your international rectifier sales repr esentative for further information.
IR11682S www.irf.com ? 2010 international rectifier 5 absolute maximum ratings absolute maximum ratings indicate sustained limit s beyond which damage to the device may occur. all voltage parameters are absolute voltages referenced to co m, all currents are defined positive into any lead. the thermal resistance and power dissipation ra tings are measured under board mounted and still air conditions. parameters symbol min. max. units remarks supply voltage v cc -0.3 20 v cont. drain sense voltage v d -1 200 v pulse drain sense voltage v d -5 200 v source sense voltage v s -3 20 v gate voltage v gate -0.3 20 v v cc =20v, gate off operating junction temperature t j -40 150 c storage temperature t s -55 150 c thermal resistance r ja 128 c/w soic-8 package power dissipation p d 970 mw soic-8, t amb =25c switching frequency fsw 400 khz recommended operating conditions for proper operation the device should be used within the recommended conditions. symbol definition min. max. units v cc supply voltage 8.6 18 v d1, v d2 drain sense voltage -3 ? 200 v t j junction temperature -25 125 c fsw switching frequency --- 400 khz ? v d1, v d2 -3v negative spike width 100ns
IR11682S www.irf.com ? 2010 international rectifier 6 electrical characteristics vcc=15v and t a = 25c unless otherwise specifi ed. the output voltage and current (v o and i o ) parameters are referenced to gnd (pin7). supply section parameters symbol min. typ. max. units remarks supply voltage operating range v cc 8.6 18 v gbd v cc turn on threshold v cc on 7.5 8.1 8.5 v v cc turn off threshold (under voltage lock out) v cc uvlo 7 7.6 8 v v cc turn on/off hysteresis v cc hyst 0.5 v 14 18 ma c load =1nf, f sw = 400khz operating current i cc 48 60 ma c load =4.7nf, f sw = 400khz quiescent current i qcc 2.6 4.3 ma start-up current i cc start 140 a v cc =v cc on - 0.1v comparator section parameters symbol min. typ. max. units remarks turn-off threshold v th1 -12 -6 0 mv turn-on threshold v th2 -220 -140 -80 mv hysteresis v hyst 141 mv input bias current i ibias1 1 10 a v d = -50mv input bias current i ibias2 10 50 a v d = 200v comparator input offset v offset 2 mv gbd one-shot section parameters symbol min. typ. max. units remarks blanking pulse duration t blank 8 17 25 s 2.5 v v cc =10v ? gbd reset threshold v th3 5.4 v v cc =20v ? gbd hysteresis v hyst3 40 mv v cc =10v ? gbd minimum on time section parameters symbol min. typ. max. units remarks minimum on time t onmin 600 850 1100 ns
IR11682S www.irf.com ? 2010 international rectifier 7 electrical characteristics vcc=15v and t a = 25c unless otherwise specifi ed. the output voltage and current (v o and i o ) parameters are referenced to gnd (pin7). gate driver section parameters symbol min. typ. max. units remarks gate low voltage v glo 0.3 0.5 v i gate = 200ma gate high voltage v gth 8.5 10.7 13.5 v v cc =12v-18v (internally clamped) rise time t r1 10 ns c load = 1nf t r2 80 ns c load = 4.7nf fall time t f1 5 ns c load = 1nf t f2 25 ns c load = 4.7nf turn on propagation delay t don 100 200 ns v ds to v gate -100mv overdrive turn off propagation delay t doff 80 120 ns v ds to v gate -100mv overdrive pull up resistance r up 5 i gate = 15ma ? gbd pull down resistance r down 1.2 i gate = -200ma ? gbd output peak current (source) i o source 1 a c load = 1nf ? gbd output peak current (sink) i o sink 4 a c load = 1nf ? gbd
IR11682S www.irf.com ? 2010 international rectifier 8 functional block diagram min on time (with cycle by cycle mot check circuit) min off time min on time (with cycle by cycle mot check circuit) min off time uvlo & regulator vd1 vcc com vd2 reset reset vth3 vth3 shoot-through protection logic vs1 vs2 vcc vcc gate2 gate1
IR11682S www.irf.com ? 2010 international rectifier 9 i/o pin equivalent circuit diagram
IR11682S www.irf.com ? 2010 international rectifier 10 lead definitions pin# symbol description 1 gate1 gate drive output 1 2 vcc supply voltage 3 vs1 sync fet 1 source voltage sense 4 vd1 sync fet 1 drain voltage sense 5 vd2 sync fet 2 drain voltage sense 6 vs2 sync fet 2 source voltage sense 7 gnd analog and power ground 8 gate2 gate drive output 2 lead assignments 4 3 2 1 5 6 7 8 vd2 vd1 gnd gate2 vcc vs1 vs2 gate1
IR11682S www.irf.com ? 2010 international rectifier 11 detailed pin description vcc: power supply this is the supply voltage pin of the ic and it is monito red by the under voltage lockout circuit. it is possible to turn off the ic by pulling this pin below the minimum turn off threshold voltage, without damage to the ic. to prevent noise problems, a by pass ceramic capacitor connected to vcc and com should be placed as close as possible to the ir11682. this pin is not internally clamped. gnd: ground this is ground potential pin of the integrated control circuit. the internal devices and gate driver are referenced to this point. vd1 and vd2: drain voltage sense these are the two high-voltage pins used to sense t he drain voltage of the two sr power mosfets. routing between the drain of the mosfet and t he ic pin must be particularly optimized. additional rc filter in not necessary but could be added to vd1 and vd2 pins to increase noise immunity. for applications which vd voltage exceeds 100v, a 1k ohm to 2kohm vd resistor is recommended to be added between the drain of sr mosfet and vd pin. the vd resistor helps to limit the switching loss of vd pins. vs1 and vs2: source voltage sense these are the two differential sense pins for the two s ource pins of the two sr power mosfets. this pin must not be connected directly to the gnd pin (pin 7) but must be used to create a kelvin contact as close as possible to the power mosfet source pin. gate1 and gate2: gate drive outputs these are the two gate drive outputs of the ic. t he gate voltage is internally clamped and has a +1a/-4a peak drive capability. although this pin can be directly connected to the synchronous rectifier (sr) mosfet gate, the use of gate resistor is recommended (specifically when putting multiple mosfets in parallel). care must be taken in order to keep the gate loop as short and as small as possible in order to achieve optimal switching performance.
IR11682S www.irf.com ? 2010 international rectifier 12 application information and additional details state diagram uvlo mode: the ic is in the uvlo mode when the vcc pin volt age is below vccuvlo. the uvlo mode is accessible from any other state of operation. in the uvlo state, most of the inte rnal circuitry is unbiased and the ic draws a quiescent current of iccstart. the ic remains in the uvlo condition until the volt age on the vcc pin exceeds the vcc turn on threshold voltage, vcc on. normal mode: once vcc exceeds the uvlo voltage, the ic is r eady to go into normal mode. the gate outputs are activated when the vds sensed on the mosfet crosses vt h3. this function will prevent the gate to turn- on towards the end of a switching cycle and prevent reve rse current in mot time. in normal mode the gate drivers are operating and the ic will draw a ma ximum of icc from the supply voltage source. mot protection mode if the secondary current conduction time is shorter t han the mot (minimum on time) time, the next drive r output is disabled. this function can avoid reverse current that occurs when the syst em works at very light/no load conditions and reduce system standby power cons umption by disabling gate outputs. the ic automatically goes back to normal operation mode onc e the load increases to a level and the secondary current conduction time is longer than mot.
IR11682S www.irf.com ? 2010 international rectifier 13 general description the ir11682 dual smart rectifier controller ic is the industry first dedicated high-voltage controller ic for synchronous rectification in resonant converter applications. the ic c an emulate the operation of the two secondary rectifier diodes by correctly driving the synchronous rectifier (sr) mosfets in the two secondary legs. the core of this device are two high-voltage, high speed comparators which sense the drain to source voltage of the mosfets differentially. the dev ice current is sensed using the r dson as a shunt resistance and the gate pin of the mosfet is driven accordingly. dedi cated internal logic then manages to turn the power device on and off in close proximity of the zero current transition. ir11682 further simplifies synchronous rectifier control by offering the following power management features: -wide vcc operating range allows the ic to be directly powered from the converter output -shoot through protection logic that pr events both the gate output s from the ic to be high at the same time -device turn on and off in close proximity of the zero current transition with low turn-on and turn-off propagation delays; eliminates reactive power flow between the output capacitors and power transformer -internally clamped gate driv er outputs that signific antly reduce gate losses. the smartrectifier? control technique is based on s ensing the voltage across the mosfet and comparing it with two negative thresholds to determine the turn on and off transitions for the dev ice. the rectifier current is sensed by the input comparat ors using the power mosfet r dson as a shunt resistance and its gate is driven depending on the level of the sensed volt age vs. the 3 thresholds shown below. v gate v th1 v th2 v th3 v ds figure 1: input comparator thresholds turn-on phase when the conduction phase of the sr fet is initiated, current will start flowing through its body diode, generating a negative v ds voltage across it. the body diode has generally a much higher voltage drop than the one caused by the mosfet on resistance and t herefore will trigger the turn-on threshold v th2 . when v th2 is triggered, ir11682 will drive the gate of mosf et on which will in turn cause the conduction voltage vds to drop down to i d *r dson . this drop is usually accompanied by some amount of ringing, that could trigger the input comparator to turn off; henc e, a fixed minimum on time (mot) blanking period is used that will maintain the power mosfet on for a minimum amount of time. the fixed mot limits the minimum conduction time of the secondary rectifiers and hence, the maximum switching frequency of the converter.
IR11682S www.irf.com ? 2010 international rectifier 14 turn-off phase once the sr mosfet has been turned on, it will remain on until the rectified current will decay to the level where v ds will cross the turn-off threshold v th1 . since the device currents are sinusoidal here, the device vds will cross the v th1 threshold with a relatively low dv/dt. once the threshold is crossed, the current will start flowing again through the body diode, causing the vds voltage to jump negative. depending on the amount of residual current, vds may once again trigger the turn-on threshold; hence, vth2 is blanked for a time duration t blank after vth1 is triggered. when the device vds crosses the positive reset threshold vth3, t blank is terminated and the ic is ready for next conduction cycle as shown below. gate drive v ds blanking time t1 t2 v th1 v th2 v th3 mot t blank i ds figure 2: secondary currents and voltages mot protection at very light load or no load condition, the current in sr fet will become discontinuous and could be shorter than mot time in some system. if this happens, the sr fe t current will flow from drain to source at the end of mot. the reverse current discharges output capac itor; stores the energy in transformer and causes resonant on vds voltage once the sr fet turns off. t he resonant could turn on the gate of ir11682, caused more reverse current and thus subsequent multi fa lse triggering as shown below in figure 3. figure 3: waveform without mot protection the cycle-by-cycle mot protection circuit can detec t the reverse current situation and disable the next output gate pulse to avoid this issue. the internal comparator and mot pulse generator still work under the protection mode. so the circuit can continuously moni tor the load current and come back to normal working mode once the load current conduction time increased to longer than mot. this circuit helps to reduce standby power losses. it also can prevent voltage spike that caused by false triggering at light load.
IR11682S www.irf.com ? 2010 international rectifier 15 figure 4: waveform under mot protection mode general timing waveform t vcc vcc on uvlo vcc uvlo normal uvlo figure 5: vcc uvlo 10% 90% t rise v th2 t fall v th1 t doff t don 50% v ds v gate figure 6: timing waveform
IR11682S www.irf.com ? 2010 international rectifier 16 0.01 0.1 1 10 5.0 v 7.5 v 10.0 v 12.5 v 15.0 v 17.5 v i supply (ma) supply voltage figure 7: supply current vs. supply voltage 7.0 v 7.5 v 8.0 v 8.5 v 9.0 v -50 c 0 c 50 c 100 c 150 c vcc uvlo thresholds temperature vcc on vcc uvlo figure 8: undervoltage lockout vs. temperature 2.3 2.4 2.4 2.5 2.5 2.6 2.6 2.7 -50 c 0 c 50 c 100 c 150 c i cc supply current (ma) te m p e r a t u r e i qcc figure 9: icc quiescent currrent vs. temperature 13.1 13.2 13.3 13.4 13.5 13.6 13.7 13.8 13.9 14.0 -50 c 0 c 50 c 100 c 150 c i cc supply current (ma) te m p e r a t u r e icc @400khz, c load =1nf figure 10: icc supply currrent @1nf load vs. temperature
IR11682S www.irf.com ? 2010 international rectifier 17 -4.8 -4.6 -4.4 -4.2 -4.0 -3.8 -50 c 0 c 50 c 100 c 150 c v th1 threshold (mv) temperature ch2 ch1 figure 11: v th1 vs. temperature -140.0 -139.5 -139.0 -138.5 -138.0 -137.5 -137.0 -136.5 -136.0 -50 c 0 c 50 c 100 c 150 c v th2 thresholds (mv) temperature ch2 ch1 figure 12: v th2 vs. temperature -135.5 -135.0 -134.5 -134.0 -133.5 -133.0 -132.5 -50 c 0 c 50 c 100 c 150 c comparator hysteresis v hyst (mv) temperature ch2 ch1 figure 13: comparator hysteresis vs. temperature 830 ns 840 ns 850 ns 860 ns 870 ns 880 ns 890 ns 900 ns -50 c 0 c 50 c 100 c 150 c minimum on time temperature mot_ch1 mot_ch2 figure 14: mot vs temperature
IR11682S www.irf.com ? 2010 international rectifier 18 90 ns 95 ns 100 ns 105 ns 110 n s 115 n s 120 ns -50 c 0 c 50 c 100 c 150 c propagation delay te m p e r a t u r e ch1 turn-on propagation delay ch2 turn-on propagation delay figure 15: turn-on propagation delay vs. temperature 70 ns 75 ns 80 ns 85 ns 90 ns 95 ns 100 ns -50 c 0 c 50 c 100 c 150 c propagation delay te m p e r a t u r e ch1 turn-off propagation delay ch2 turn-off propagation delay figure 16: turn-off propagation delay vs. temperature 10.0 v 10.5 v 11.0 v 11.5 v -50 c 0 c 50 c 100 c 150 c gate clamping voltage te m p e r a t u r e ch1 vgh@vcc=12v ch2 vgh@vcc=12v ch1 vgh@vcc=18v ch2 vgh@vcc=18v figure 17: gate clamping voltage vs. temperature 5 ns 6 ns 6 ns 7 ns 7 ns 8 ns 8 ns 9 ns 9 ns 10 ns -50 c 0 c 50 c 100 c 150 c gate tr and tf @ 1nf load temperature tr_ch1 tr_ch2 tf_ch1 tf_ch2 figure 18: gate output tr and tf time @ 1nf load vs. temperature
IR11682S www.irf.com ? 2010 international rectifier 19 package details: soic8n
IR11682S www.irf.com ? 2010 international rectifier 20 tape and reel details: soic8n e f a c d g a b h n ote : controlling dimension in mm loaded tape feed direction a h f e g d b c carrier tape dimension for 8soicn code min max min max a 7.90 8.10 0.311 0.318 b 3.90 4.10 0.153 0.161 c 11.70 12.30 0.46 0.484 d 5.45 5.55 0.214 0.218 e 6.30 6.50 0.248 0.255 f 5.10 5.30 0.200 0.208 g 1.50 n/a 0.059 n/a h 1.50 1.60 0.059 0.062 metric imperial reel dimensions for 8soicn code min max min max a 329.60 330.25 12.976 13.001 b 20.95 21.45 0.824 0.844 c 12.80 13.20 0.503 0.519 d 1.95 2.45 0.767 0.096 e 98.00 102.00 3.858 4.015 f n/a 18.40 n/a 0.724 g 14.50 17.10 0.570 0.673 h 12.40 14.40 0.488 0.566 metric imperial
IR11682S www.irf.com ? 2010 international rectifier 21 part marking information
IR11682S www.irf.com ? 2010 international rectifier 22 ordering information standard pack base part number package type form quantity complete part number tube/bulk 95 IR11682Spbf ir11682 soic8n tape and reel 2500 IR11682Strpbf the information provided in this document is believed to be accu rate and reliable. however, international rectifier assumes no responsibility for the consequences of the use of this information. international rectifier assumes no responsibility for any infringement of patents or of other rights of third parties which may result fr om the use of this information. no license is granted by imp lication or otherwise under any patent or patent rights of international rectif ier. the specifications ment ioned in this document are subj ect to change without notice. this document supersedes and replaces all inform ation previously supplied. for technical support, please contact ir?s technical assistance center http://www.irf.com/technical-info/ world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252-7105

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